1. Field of the Invention
The invention described herein is related to generating a voltage amplitude signal in accordance with a digital code. More specifically, the invention is related to converting a digital code to an analog signal by interpolating between coarse reference voltage levels to produce an output voltage.
2. Description of the Prior Art
Modern electronic systems operate on signals bearing information to be relayed over a signal path, where the information is borne generally in either a varying voltage amplitude of an analog waveform or as a numeric value of a binary digital word. Signal conversion is thus necessary at different stages in the system to obtain an analog signal from its corresponding digital code representation, and vice-versa. Modern mixed-signal systems may therefore contain numerous digital-to-analog converters, or DACs. Although many DACs have high speed and precision requirements, many others require only modest linearity and speed, such as for calibration to minimize effects of process, temperature and voltage differences accentuated by modern deep sub-micron integrated circuit manufacturing processes. For these so-called utility DACs, it is beneficial to minimize power consumption and circuit area, especially since the same DAC design may be used in several different places in any given system.
One such utility DAC design is that of the voltage interpolating DAC, where coarse voltage references are generated through, for example, a tapped resistor string. The final output voltage is then fine-tuned between the coarse voltages by a voltage interpolator, which, as the name suggests, interpolates many voltage levels between two reference voltages with which it is provided.
Referring to FIG. 1, there is shown a schematic diagram of a prior art voltage interpolator, which was designed by CADENCE DESIGN SYSTEMS, INC. and has been incorporated into various DAC designs in recent years. The depicted voltage interpolator 100 is a multiple-input folded-cascode amplifier 110 combined with a Miller compensated output stage 150. Each differential pair implementing an input stage, a representative one of which is illustrated at 120, is coupled to one of the reference voltages VA or VB through a switching device 122. The reference voltages are supplied by a reference voltage generator, such as a tapped resistor string designed for such purpose. The interpolated output voltage VOUT is determined by the number of inputs connected to VA and the number of inputs connected to VB. For example, if half of the N inputs are coupled to VA and half to VB, VOUT would be a voltage half way between VA and VB.
Voltage interpolator 100, although suitable in its function, occupies a significant percentage of the physical area of an integrated circuit die in realizing the DAC. Each differential pair 120 requires a dedicated current source 125, which, in large numbers, consume a significant portion of precious circuit die area. Further, each differential pair 120 requires a switching device 122 to connect the input reference voltage thereto. Whereas the switching device 122 is shown as a single-pole double-throw switch, the implementation of such is generally through at least a pair transistors respectively conveying one of the reference voltages to the input of the differential stage 120. Each of those transistors in turn requires an associated control line, which must be routed with the other interconnections required to connect the numerous components of the DAC. Moreover, the control lines require associated circuitry to implement the switching device selection logic. Thus, it should be apparent to the skilled artisan that the die space necessary to implement the input stage 110 alone of voltage interpolator 100 is significant.
The output stage 150 of voltage interpolator 100 not only consumes die space, but significantly contributes to the overall power consumption requirements of the DAC. Additionally, the output stage 150 presents considerable complexity to stabilize the negative feedback design.
Given the shortcomings of the prior art, the need has been felt for a voltage interpolating DAC that is more compact and less complex, while guaranteeing monotonic interpolation steps.